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foundry:umc

United Microelectronic Corporation (UMC)

Fabs

Processes

  • 28 nm
  • 40 nm
  • 65 nm
  • 90 nm
  • 0.13 um
  • 0.15 um
  • 0.18 um
  • 0.25 um
  • 0.35 um
  • 0.5 um
  • 0.6 um
  • 8“ wafers

90 nm

General characteristics

Mostly copper with thick aluminum on the top layer.

Identification

Devices

180 nm

General characteristics

1.8V core with I/O up to 3.3V. Many mixed-signal devices will have an on-die LDO for generating 1.8 from 3.3 however higher end devices such as programmable logic typically expect an external 1.8V supply.

4-5 aluminum layers with tungsten vias, titanium-based barrier metal, and cobalt silicide contacts.

Partial design rules and FIB sections at http://siliconexposed.blogspot.com/2014/02/process-overview-umc-180nm-envm.html

Power ring and pad layouts can vary somewhat, as does presence or absence of CMP filler between bond pads.

On-die Flash/EEPROM option available.

Identification

The CMP filler pattern is distinctive and can be used as positive ID. Fill polygons are rectangles with 2:1 aspect ratio, long side oriented parallel to the prevailing routing direction.

CMP fill pattern table (measured from XC2C32A)

Layer Width Height X pitch (μm) Y pitch (μm) Conditions
M4 3375 6140 3975 6975 Overglass
M4 1875 4875 3915 6870 Bare metal
M3 3000 825 3870 1960 With overglass removed, M4 present
M3 3075 1125 3952 1995 With M3 removed

Devices

Devices

foundry/umc.txt · Last modified: 2015/01/04 17:50 (external edit)