Xilinx XC9500XL CPLD family.

Made on a 350nm process by UMC initially, fab moved to He Jian Technology Company later in the product life cycle (2005) 1). 4 aluminum metal layers.

XC9536XL (4.38 mm2) XC9572XL (7.27 mm2) XC95144XL (13.16 mm2) XC95288XL

X8400 (rev A)

X8410 (rev A)

X8420 (rev A)

Thumbnail scale: 9 μm/pixel

One function block is 18 macrocells or “400 gates”.

vendor/xilinx/xc9500xl.txt · Last modified: 2015/01/04 22:50 (external edit)
Except where otherwise noted, content on this wiki is licensed under the following license: CC Attribution 4.0 International
Recent changes RSS feed Donate Powered by PHP Valid XHTML 1.0 Valid CSS Driven by DokuWiki