72-macrocell / 1600 gate Xilinx XC9500XL series CPLD.

Decapped on 1/29/2014 by lab group A of CSCI 4974/6974 at RPI.



Die size: 2020 x 3600 μm (7.27 mm^2)

azonenberg/xilinx/xc9572xl.txt · Last modified: 2015/01/04 22:50 (external edit)
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