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azonenberg:xilinx:xc3s50an [2014/02/05 02:27] azonenberg created |
azonenberg:xilinx:xc3s50an [2015/01/04 22:50] (current) |
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SRAM+Flash hybrid FPGA contains an XC3S50A die from Xilinx and an Atmel DataFlash die wire-bonded together. | SRAM+Flash hybrid FPGA contains an XC3S50A die from Xilinx and an Atmel DataFlash die wire-bonded together. | ||
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====== Package ====== | ====== Package ====== | ||
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Device was decapped in-package with 68% HNO3 on 1/29/2014 by lab group A of CSCI 4974/6974 at RPI. Note leadframe damage and bond wires with one end floating; the floating bond wires were easily bent by a short blast of compressed air. | Device was decapped in-package with 68% HNO3 on 1/29/2014 by lab group A of CSCI 4974/6974 at RPI. Note leadframe damage and bond wires with one end floating; the floating bond wires were easily bent by a short blast of compressed air. | ||
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====== Flash die ====== | ====== Flash die ====== |