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azonenberg:microchip:enc424j600 [2014/02/14 07:11]
mcmaster
azonenberg:microchip:enc424j600 [2015/01/04 22:50] (current)
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-{{tag>collection_az vendor_microchip type_interface type_interface/serdes type_interface/serdes/ethernet type_network type_network/ethernet foundry_unknown tech_unknown}}+{{tag>collection_az vendor_microchip type_interface type_interface/serdes type_interface/serdes/ethernet type_network type_network/ethernet foundry_tsmc tech_180nm}}
  
 10/100mbit SPI/parallel Ethernet controller. 10/100mbit SPI/parallel Ethernet controller.
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 Rough stitch of old images with Am10x objective. Need to re-shoot at higher resolution. Rough stitch of old images with Am10x objective. Need to re-shoot at higher resolution.
  
-[[http://siliconpr0n.org/map/microchip/enc424j600/top_metal_am10x/|Map]]+[[http://siliconpr0n.org/map/microchip/enc424j600/mz_am10x/|Map]]
  
 {{:azonenberg:microchip:enc424j600-m3-100x-cropped-4k.jpg?600|}} {{:azonenberg:microchip:enc424j600-m3-100x-cropped-4k.jpg?600|}}
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 {{:azonenberg:microchip:enc424j600_01_bf_neo40x_annotated.jpg?600|}} {{:azonenberg:microchip:enc424j600_01_bf_neo40x_annotated.jpg?600|}}
 +
 +Partial HF delayer of SRAM. Confirmed to be same process as PIC32 based on SRAM cell pitch.
 +
 +{{:azonenberg:microchip:enc424j600_sram_01_bf_neo40x_annotated.jpg?600|}}
 
azonenberg/microchip/enc424j600.1392361903.txt.gz · Last modified: 2014/02/14 07:11 by mcmaster
 
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