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dcstraney:ddc:bus65601-883b

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dcstraney:ddc:bus65601-883b [2025/11/27 05:03] dcstraneydcstraney:ddc:bus65601-883b [2025/11/27 17:26] (current) dcstraney
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-{{tag>collection_dcstraney vendor_ddc type_mcm type_interface year_unknown foundry_unknown}}+{{tag>collection_dcstraney vendor_ddc type_mcm type_interface year_unknown foundry_utmc}}
  
  
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 </code> </code>
  
 +**Gate array: CDI (Computing Devices International?) HC12605**
  
 {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die3.thumb.jpg}} {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die3.thumb.jpg}}
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   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die3.jpg|Single]] (4342x5432, 13.5213MiB)   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die3.jpg|Single]] (4342x5432, 13.5213MiB)
  
 +
 +**Harris HD 15530, "MTU Encoder" from 1977:** "MTU" is a MIL-STD-1553 term
  
 {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die4.thumb.jpg}} {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die4.thumb.jpg}}
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   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die4.jpg|Single]] (10132x8497, 49.9694MiB)   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die4.jpg|Single]] (10132x8497, 49.9694MiB)
  
 +
 +**Gate array: UTMC MK63000C / UT300C**
  
 {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die5.thumb.jpg}} {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die5.thumb.jpg}}
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   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die5.jpg|Single]] (7852x7556, 44.0822MiB)   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die5.jpg|Single]] (7852x7556, 44.0822MiB)
  
 +
 +**Gate array: UTMC MK64000B / UT1024B**
  
 {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die6.thumb.jpg}} {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die6.thumb.jpg}}
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   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die6.jpg|Single]] (3044x2000, 3.66719MiB)   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die6.jpg|Single]] (3044x2000, 3.66719MiB)
  
 +
 +**Gate array: CDI (Computing Devices International?)**
  
 {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die1.thumb.jpg}} {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die1.thumb.jpg}}
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   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die5_zoom.jpg|Single]] (2536x2563, 3.12521MiB)   * [[https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die5_zoom.jpg|Single]] (2536x2563, 3.12521MiB)
  
 +
 +**Unknown SSI CMOS logic**
  
 {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die2.thumb.jpg}} {{https://siliconprawn.org/map/ddc/bus65601-883b/single/ddc_bus65601-883b_dcstraney_mz_die2.thumb.jpg}}
dcstraney/ddc/bus65601-883b.txt · Last modified: 2025/11/27 17:26 by dcstraney