azonenberg:xilinx:xc3s50a
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| azonenberg:xilinx:xc3s50a [2014/02/16 07:27] – azonenberg | azonenberg:xilinx:xc3s50a [2025/08/04 21:24] (current) – external edit 127.0.0.1 | ||
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| Size is approximately 3200 x 2850 μm (9.12 mm< | Size is approximately 3200 x 2850 μm (9.12 mm< | ||
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| + | ===== M8 with intact passivation ===== | ||
| {{: | {{: | ||
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| {{: | {{: | ||
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| + | ===== M8 with passivation removed ===== | ||
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| + | {{: | ||
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| + | ===== M7 ===== | ||
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| + | {{: | ||
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| + | M6 and below could not be revealed cleanly with HF etching, need to CMP another die. | ||
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| + | ===== Active ===== | ||
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| + | {{: | ||
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| + | Might be some poly too. | ||
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| + | Left side of block RAM | ||
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| + | {{: | ||
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| + | Gap between two groups of CLBs | ||
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| + | {{: | ||
azonenberg/xilinx/xc3s50a.1392535634.txt.gz · Last modified: 2014/02/16 07:27 by azonenberg
