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+{{tag>collection_az vendor_microchip year_2006 type_memory type_memory/sram foundry_umc tech_180nm}}
+SPI serial SRAM chip. Looks like 4 metal layers and a fairly fine process geometry.
+Definitely //not// one of Microchip's standard fab processes. CMP filler pattern is consistent with UMC 180 nm (pitch and dimensions of CMP filler and traces on both M4 and M3 match [[azonenberg:xilinx:xc2c32a]] within 3%) however this is the only evidence we have to support this conclusion at this time; tag is tentative.
+The die ID also does not match the normal Microchip layout and there is no Microchip logo on the die. Maybe this mask set was acquired from a buyout or something?
+There are three unbonded pads on the die. Purpose of these is unknown at this time since all known packages are 8 pins.
+====== Package ======
+-pin SOIC.
+{{:azonenberg:microchip:dscf4970_cropped.jpg?300|}}
+Markings:
+K256I
+    SN (e3) 1002
+    (Microchip logo) ADJ
+====== Die ======
+Size is approximately 2110 x 1120 μm (2.36 mm<sup>2</sup>)
+{{:azonenberg:microchip:23k256_bf_neo10x_3k.jpg?600|}}
+Die copyright area. Markings:
+    M4-B
+    (C) (M) 2006
+    E1090-A
+{{:azonenberg:microchip:23k256_07_bf_neo40x_annotated.jpg?600|}}
+Top left of SRAM array
+{{:azonenberg:microchip:23k256_08_bf_neo40x_annotated.jpg?600|}}
+Middle of SRAM array
+{{:azonenberg:microchip:23k256_09_bf_neo40x_annotated.jpg?600|}}
+Random logic, with focus on M4 and on M3
+{{:azonenberg:microchip:23k256_10_bf_neo40x_annotated.jpg?600|}}
+{{:azonenberg:microchip:23k256_11_bf_neo40x_annotated.jpg?600|}}