This is an old revision of the document!
Microchip PIC32 microcontroller.
* 32 KB of SRAM * 512 KB of NOR flash * MIPS M4K CPU * ADC * PLL * Other miscellaneous stuff
Size is approximately 4280 x 4740 μm (20.29 mm2).
Looks to be a 4-metal ~220 nm process.
Overview
Interesting region in the middle of the die. Not sure what it does but provides a nice view of standard cells on lower layers.
Test points on the flash array. Probably tied to bit/word lines. Maybe used for measuring read/erase margins during characterization?
Random wiring in the middle of the die with test points
Mask rev markings
Test patterns on bottom edge
Power busing near flash with exposed vias. ~700 nm via pitch is consistent with the 220-250 nm process node.