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--- determining_pinout [2012/03/02 07:13] – created mcmaster
+++ determining_pinout [2025/08/04 21:23] (current) – external edit 127.0.0.1
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+====== Numbering ======
+Most standard numbering seems to be upper left is pin 1 and go counter-clockwise.
 ====== Photograph in package ======
@@ Line 10: / Line 15: @@
 {{gallery>:mcmaster:pmos_nmos_sizes.jpg}}
-Notice that the right side is larger.  This means that the right side is PMOS and the left side is NMOS.  Since NMOS likes to connect to ground and PMOS likes to connect to V+ the right side is V+ and the left side is V-.
+Notice that the left side is smaller than the right?  This means that the left side is NMOS and the right side is PMOS.  Since NMOS on the left likes to connect to ground (V-) and PMOS on the right likes to connect to power (V+) we have identified the power nets.  This can then be traced as needed.
+If the cells are matched size or its a specialized chip you might not have this luxury.  In that case start looking for connections to ground rings.  For example, in this chip power pins are very distinctive because the protection network is very different, it feeds directly to the power ring around the chip, and the input is a lot larger:
+{{gallery>:mcmaster:power_pin.png}}
+====== Functional grouping ======
+More often than not you can figure out a lot of pins based on their clustering and general layout.  For example, if you know you have a 16 bit bus look for 16 similar pins.  The routing should be very regular and distinctive since most pins won't be both inputs and outputs.