Ortec LG101/N Linear Gate

NIM Model LG101 Linear Gate Module

1.1 GENERAL INFORMATION
The LG101 LINEAR GATE Module (Fig. 1) will inhibit or linearly pass +1.0 to -1.0 volt signals in response to a logic signal. A constant 50-ohm termination is presented to the signal to be gated, and the signal will not feed through a closed gate. The LG101 is completely direct-coupled, and is thus free from rate effects. The input is protected from damage by large signals, and the circuit recovers quickly from overload.

1.2 SPECIFICATIONS

GATE INPUT

For logic signals* or complementary logic signals. 50-ohm termination reflections <5%. Absolute maximum input +/- 3. 5 Volts

GATE OPENING TIME

Typ. 2.5 nSec, 10%-90%

GATE CLOSING TIME

Typ. 2.5 nSec, 10%-90%

GATE RATE

DC to >75 MHz

GATE WIDTH

Approximately same as Gate Input signal width

GATE DELAY

Typ. 1.3 nSec, -600 mV input point to gate 10% open

SIGNAL INPUT

+1.0 Volts to -1.0 Volts linear range. 50-ohm termination, independent of gate state; reflections < 5% for +/- 1 volt inputs of Tr ~= Tf ~= 1 nSec; reflections < 10% for +/- 10 Volt inputs of Tr ~= Tf ~= 1 nSec. Absolute maximum input: +/-5 Vdc; +/-10 Volts, 10% duty factor pulses of width <100 nSec; +/-50 Volts, 100 nSec transients

SIGNAL FEEDTHROUGH

No steady-state feedthrough or breakthrough up to absolute maximum input limits. Transient feed-through < 1 % for Tr ~= Tf ~= 1 nSec (differentiation time constant = 0. 7 nSec)

GAIN

Typ. 0.85

BANDWIDTH

Typ. DC to 175 MHz. Tr ~= Tf, typ. 2.0 nSec

SIGNAL PROPAGATION DELAY

2 nSec typ.

LINEARITY

Better than +/-2% for +750mV to -650mV inputs; better than +5% for +950mV to -675mV inputs

PEDESTAL

Adjustable to 0 +/-2 mV; adjustment range greater than +/-50 mV

GATING TRANSIENTS

Less than 30 mV, baseline to worst peak

DC STABILITY

Better than -15 uA/'C at the output

TEMPERATURE

-15'C to +60'C

POWER REQUIRED

+20 Volts, 103 mA max; -20 Volts, 110 mA max

PANEL COLOR

Red

*Compatible with NIM standard fast logic signal definition. T₀₁ denotes ZERO to ONE transition; T₁₀ denotes ONE to ZERO transition. T₀₁ and T₁₀ measured between -100 mV and -600 mV.

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GATE INPUT	For logic signals* or complementary logic signals. 50-ohm termination reflections <5%. Absolute maximum input +/- 3. 5 Volts
GATE OPENING TIME	Typ. 2.5 nSec, 10%-90%
GATE CLOSING TIME	Typ. 2.5 nSec, 10%-90%
GATE RATE	DC to >75 MHz
GATE WIDTH	Approximately same as Gate Input signal width
GATE DELAY	Typ. 1.3 nSec, -600 mV input point to gate 10% open
SIGNAL INPUT	+1.0 Volts to -1.0 Volts linear range. 50-ohm termination, independent of gate state; reflections < 5% for +/- 1 volt inputs of Tr ~= Tf ~= 1 nSec; reflections < 10% for +/- 10 Volt inputs of Tr ~= Tf ~= 1 nSec. Absolute maximum input: +/-5 Vdc; +/-10 Volts, 10% duty factor pulses of width <100 nSec; +/-50 Volts, 100 nSec transients
SIGNAL FEEDTHROUGH	No steady-state feedthrough or breakthrough up to absolute maximum input limits. Transient feed-through < 1 % for Tr ~= Tf ~= 1 nSec (differentiation time constant = 0. 7 nSec)
GAIN	Typ. 0.85
BANDWIDTH	Typ. DC to 175 MHz. Tr ~= Tf, typ. 2.0 nSec
SIGNAL PROPAGATION DELAY	2 nSec typ.
LINEARITY	Better than +/-2% for +750mV to -650mV inputs; better than +5% for +950mV to -675mV inputs
PEDESTAL	Adjustable to 0 +/-2 mV; adjustment range greater than +/-50 mV
GATING TRANSIENTS	Less than 30 mV, baseline to worst peak
DC STABILITY	Better than -15 uA/'C at the output
TEMPERATURE	-15'C to +60'C
POWER REQUIRED	+20 Volts, 103 mA max; -20 Volts, 110 mA max
PANEL COLOR	Red