LeCroy 4298 TDC Controller, ECL

Dedicated CAMAC Model 4298 Drift Chamber TDC Controller

The 4298 Drift Chamber Digitizer Controller is located in sta- tion numbers 24 and 25 of a standard dedicated CAMAC crate containing up to 23 Model 4291 Drift Chamber Digitizer modules. The Controller, designed to read out, calibrate, and test a complete crate of time digitizers, is con- nected to any CAMAC System via the Model 4299 DATABUS Interface Buffer. A maximum of 16 Model 4298s (or DATABUS compatible controllers) can be daisy chained on the same DATABUS.

The different operating modes of the system are selectable via a set of side-panel accessible switches and four 16-bit internal registers. The ORDER register, the TIME register, and two ADDRESS registers (NL and NH) are CAMAC pro- grammable via the Model 4299 DATABUS Interface. COM- MON START or COMMON STOP operation is selected via a side-panel switch.

The block diagram on opposite page provides detailed infor- mation on the operation of the Model 4298. In general, the time digitizer's conversion sequence is initiated upon receipt of a trigger signal from the experiment via its EXPeri- ment COMmon input, which then self inhibits until the end of the clear cycle. At the end of the conversion, compacted data 1 < DATA < 512 (data compacting is implemented or suppressed by proper programming of the ORDER register) is automatically transferred to the 4299 DATABUS Interface which acts as a memory buffer for up to 4K words. The data is organized in the 4299 Memory as is shown in the chart below.

At the end of the data transfer, an automatic clear to the digitizers is generated and the 4299 LAM circuit is set On. The Test or AUTOTRIM features of the Model 4298 are centered around the internally programmable, crystal con- trolled, time mark generator and the related control logic which provide accurate timing signals on the four START and STOP front panel outputs. To perform an Internal Test or AUTOTRIM of a crate of 4291 s, connect equal length cables from the START 2 and STOP 2 outputs to the appropriate INTernal COMmon and TEST inputs (order depends on whether in COMMON START or STOP mode) and generate the Test or AUTOTRIM commands via the 4299. The Wire inputs will be disabled, and timing pulses will be injected at the TDC inputs. INT COM input simulates the EXPeriment COMmon trigger. The system can also be Tested or AUTOTRIMmed via the front panel Wire input connectors by using START 1 and STOP 1 outputs and the EXTernal COM- mon along with the external test pulse distribution system for the inputs (including as much of the chamber cabling and preamps as is possible). The added propagation delay of the external wiring can be compensated for by using the side- panel switch-settable digital delay incorporated in the 4298. Proper cabling diagrams are included in the User Manual. In either internal or external test mode, the TIME register in the 4298 determines the time interval between the START and the STOP pulses allowing precision computer con- trolled testing of the entire system.

When an AUTOTRIM mode is initiated, the TIME register is alternately set to t = 0 for the pedestal trimming and t = full scale for the gain trimming, with the entire AUTOTRIM cycle performed automatically by the 4298 Controller. If the Chamber System is included in the external mode, any variations or drifts in external preamps, cabling, etc. will be calibrated out.

SPECIFICATIONS -- Dedicated CAMAC Model 4298 Drift Chamber TDC Controller

INPUTS

General:

Lemo-type front panel connectors. Require NIM-level inputs. Im- pedance, 50 ohms +/-5%. Direct coupled. Reflections <10% for risetime > 2 nsec.

CLEAR:

Resets 4298 and all 4291s in crate. Minimum width 20 nsec.

INHibit:

Inhibit all Wire inputs when activated.

EXPeriment COMmon:

Used as the Common Start or Common Stop input. Derived from the experiment trigger. Starts system digitization. Inhibited by INH and/or system BUSY signal. COMMON START Mode: The 4291 Time Digitizers cannot be stopped during the first 200 nsec following the EXP COM input. COMMON STOP Mode: The START to the 4291s must precede the EXP COM input by at least 200 nsec.

EXTernal COMmon:

Used as Common Start or Common Stop input when simulated wire pulses are routed to the chamber electronics to include them in test or for AUTOTRIM. Starts system digitization. Disabled by Internal Test mode.

COMMON START Mode:

EXT COM input is connected to START 1 output. STOP 1 output signal must be routed to the chamber test pulse system which then generates stop pulses to the time digitizers.

COMMON STOP Mode:

EXT COM input is connected to STOP 1 out- put. START 1 output signal must be routed to the chamber test pulse system which then generates start pulses to the time digitizers.

INTernal COMmon:

Used as Common Start or Common Stop input when simulated wire pulses are routed internally via the test line on the CAMAC Dataway to test or AUTOTRIM. Starts system digitization. Disabled by External Test mode.

COMMON START Mode:

INT COM input is corrected to START 2 out- put. STOP 2 output signal must be connected to the TEST input which routes the stop signal to the time digitizers via the test line on the CAMAC Dataway.

COMMON STOP Mode:

INT COM input is connected to STOP 2 out- put. START 2 output signal must be connected to the TEST input which routes the stop signal to the time digitizers via the test line on the CAMAC Dataway.

TEST:

Activates the test line on the CAMAC Dataway for an internal test or AUTOTRIM sequence. This input is disabled in the external mode.

OUTPUTS

General:

Lemo-type front panel connectors. High impedance (current source) supplies NIM-levels into 50 ohms: (O levels= 0 mA+/- 2 mA; 1 level= 16 mA+/- 2 mA). Risetime and falltime <3 nsec. Overshoot 10%.

START 1, 2:

Internally generated when a Test or Autotrim cycle is initiated.

STOP 1, 2:

Internally generated when a Test or Autotrim cycle is initiated. Delayed from START by precision time mark generator set from TIME register. Both have independent switch-settable delays, where STOP 1 is side- panel accessible to allow for compensation of delay when using the external mode.

BUSY:

Double-amplitude NIM pulse generated for duration of conversion and readout.

DATABUS I/0:

Allows cascading of multiple LeCroy dedicated Controllers or Proces- sors to one 4299 for data or control word transfer. Cable to 4299 Inter- face should be LeCroy DAT-DO/50-LL and to other 4298 Controllers should be DAT-DI/50-LL (or use 3M 3302/50 Flat Ribbon Cable with 3M 3425-6050 Connector or LeCroy 403 211 050 Connector). The last processor on the DATABUS requires a Terminator, DAT-TR/50.

SIDE-PANEL SWITCHES

Allows user selection of operating modes and flag bits. See User Manual for detailed setup information.

PACKAGING

No. 2 RF-CAMAC module conforming to ESONE Report EUR4100E and IEEE Standard 583.

CURRENT REQUIREMENTS

+6 V at 2.4 A
-6 V at 2.4 A

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INPUTS
General:	Lemo-type front panel connectors. Require NIM-level inputs. Im- pedance, 50 ohms +/-5%. Direct coupled. Reflections <10% for risetime > 2 nsec.
CLEAR:	Resets 4298 and all 4291s in crate. Minimum width 20 nsec.
INHibit:	Inhibit all Wire inputs when activated.
EXPeriment COMmon:	Used as the Common Start or Common Stop input. Derived from the experiment trigger. Starts system digitization. Inhibited by INH and/or system BUSY signal. COMMON START Mode: The 4291 Time Digitizers cannot be stopped during the first 200 nsec following the EXP COM input. COMMON STOP Mode: The START to the 4291s must precede the EXP COM input by at least 200 nsec.
EXTernal COMmon:	Used as Common Start or Common Stop input when simulated wire pulses are routed to the chamber electronics to include them in test or for AUTOTRIM. Starts system digitization. Disabled by Internal Test mode.
COMMON START Mode:	EXT COM input is connected to START 1 output. STOP 1 output signal must be routed to the chamber test pulse system which then generates stop pulses to the time digitizers.
COMMON STOP Mode:	EXT COM input is connected to STOP 1 out- put. START 1 output signal must be routed to the chamber test pulse system which then generates start pulses to the time digitizers.
INTernal COMmon:	Used as Common Start or Common Stop input when simulated wire pulses are routed internally via the test line on the CAMAC Dataway to test or AUTOTRIM. Starts system digitization. Disabled by External Test mode.
COMMON START Mode:	INT COM input is corrected to START 2 out- put. STOP 2 output signal must be connected to the TEST input which routes the stop signal to the time digitizers via the test line on the CAMAC Dataway.
COMMON STOP Mode:	INT COM input is connected to STOP 2 out- put. START 2 output signal must be connected to the TEST input which routes the stop signal to the time digitizers via the test line on the CAMAC Dataway.
TEST:	Activates the test line on the CAMAC Dataway for an internal test or AUTOTRIM sequence. This input is disabled in the external mode.
OUTPUTS
General:	Lemo-type front panel connectors. High impedance (current source) supplies NIM-levels into 50 ohms: (O levels= 0 mA+/- 2 mA; 1 level= 16 mA+/- 2 mA). Risetime and falltime <3 nsec. Overshoot 10%.
START 1, 2:	Internally generated when a Test or Autotrim cycle is initiated.
STOP 1, 2:	Internally generated when a Test or Autotrim cycle is initiated. Delayed from START by precision time mark generator set from TIME register. Both have independent switch-settable delays, where STOP 1 is side- panel accessible to allow for compensation of delay when using the external mode.
BUSY:	Double-amplitude NIM pulse generated for duration of conversion and readout.
DATABUS I/0:	Allows cascading of multiple LeCroy dedicated Controllers or Proces- sors to one 4299 for data or control word transfer. Cable to 4299 Inter- face should be LeCroy DAT-DO/50-LL and to other 4298 Controllers should be DAT-DI/50-LL (or use 3M 3302/50 Flat Ribbon Cable with 3M 3425-6050 Connector or LeCroy 403 211 050 Connector). The last processor on the DATABUS requires a Terminator, DAT-TR/50.
SIDE-PANEL SWITCHES	Allows user selection of operating modes and flag bits. See User Manual for detailed setup information.
PACKAGING	No. 2 RF-CAMAC module conforming to ESONE Report EUR4100E and IEEE Standard 583.
CURRENT REQUIREMENTS	+6 V at 2.4 A -6 V at 2.4 A