LeCroy 4222 Quad Gate/Delay Generator, ECL

CAMAC Model 4222 Quad, Wide Range, Gate and Delay Generator

The LeCroy Model 4222, Quad, Wide Range, Gate and Delay Generator, produces long, precise time delays and time intervals synchronously with a random Trigger input. The 4-channel module features wide dynamic range with high resolution and minimum dead- time. All 4 channels of the Model 4222 are started by a common Trigger input. Each channel provides a programmable time delay of up to 16.7 msec in 1 nsec increments.

Three outputs are provided for each channel:
- a level output providing a NIM signal which goes "true" after the programmed time delay and is reset by the Clear;

- a level output providing a NIM signal which goes "false" after the programmed time delay and is reset by the Clear;

- a pulse output providing a 5 V fast risetime signal into 50 Ohm after the programmed time delay.

Outputs 1 and 2, or outputs 3 and 4, can be internally coupled to generate two independent programmable time windows synchronized to the Trigger input.

The Model 4222 may be set to Retrigger Mode (side switch selectable) permitting the unit to retrigger without being reloaded. In Retrigger Mode, a second side switch permits two options: the unit may be retriggered anytime 100 nsec after the last trigger, or anytime after the longest delay has elapsed.

An external clock may be used to feed several Model 4222 modules with an identical time base.

SPECIFICATIONS CAMAC Model 4222 Quad, Wide Range, Gate and Delay Generator

INPUT CHARACTERISTICS

Trigger Input (TRIG):

Two bridged front panel Lemo-type connectors; high input impedance; positive/negative edge selection via switch through side cover; threshold level adjustable between - 1.5 and + 1.5 V with a front panel potentiometer; 1OX threshold monitor on front panel; minimum input width: 5 nsec; the unused input must be terminated in 50 Ohm.

Clear Input (CLR):

Two bridged front panel Lemo-type connectors; high input impedance accepts NIM level pulses; minimum input width: 50 nsec; the unused input must be terminated in 50 Ohm.
If a Clear pulse is received when a delay is being generated all outputs are reset to quiescent state and the Trigger input is enabled.

Clock Input (CK):

Two bridged front panel Lemo-type connectors: high input impedance; selected via an internal strap; NIM level inputs; the unused input must be terminated in 50 Ohm.
Clock input frequency must be 31.25 MHz 0.1 %. Stability determines the long-term accuracy of the time delays.

OUTPUT CHARACTERISTICS

BUSY and BUSY Outputs (B & B'):

Two front panel Lemo-type connectors; NIM level outputs. BUSY output state goes true in response to a valid Trigger and remains true until either the end of the shortest delay or the end of the longest delay as selected by an internal switch.

Delayed Level Outputs (OUT & OUT):

Two front panel Lemo-type connectors per channel: NIM level outputs; both direct (OUT) and complementary (OUT) outputs are provided. A set of side panel switches permits the selection of either independent outputs or coupled window outputs for channels 1 and 2, or 3 and 4, separately:

Channels 1 and 2 (or 3 and 4) INDEPENDENT:

Each channel output (OUT) goes "true" when the corresponding programmed time delay has elapsed; output is reset by the Clear or by the next Trigger if the Retrigger Mode has been selected.

Channels 1 and 2 (or 3 and 4) COUPLED:

Channel 1 (3) output (OUT) goes "true" when time delay 1 (3) has elapsed and goes "false" when time delay 2 (4) has elapsed; delay 1 (3) < delay 2 (4). Channel 2 (4) output (OUT) goes "true" when delay 2 (4) has elapsed and is reset by Clear or by the next Trigger if the Retrigger Mode has been selected.

Delayed Pulse Output (Pl - P4):

One front panel Lemo-type connector per channel. Each Channel PULSE OUT delivers a 1 nsec risetime 5V pulse (into 50 Ohm) when the corres- ponding time delay has elapsed; pulse width 1 00 nsec +/- 10%.

CAMAC COMMANDS AND FUNCTIONS

Z:

Initializes module resets all channels, disables trigger input and enables CAMAC access (does not reset data registers).

C

Resets all channels (does not reset data registers), equivalent to front panel Clear input.

I

Disables trigger input when present.

X:

X response is generated for each valid function.

Q:

Q response is generated for each valid function unless otherwise specified.

F(O)-A(0-3):

Reads selected programmed delay for channels 1-4 in 24 bits; Q=l always; 24-bit unsigned integer convention.

F(l)-A(O):

Reads status via Read Lines 1 to 4:

Rl = 1 if shortest delay elapsed;
R2 = 1 if longest delay elapsed;
R3 = 1 if Model 4222 is ready for trigger;
R4 = 1 if CAMAC access enabled.
All states are strobed by the leading edge of the CAMAC N signal.

F(9)-A(O):

Resets all channels (does not reset data registers) equivalent to external Clear input.

F(1 6)-A (0-3):

If CAMAC access enabled, writes delay to selected channel 1-4 in 24 bits. Q = 1 if CAMAC access enabled; Q = 0 otherwise. 24-bit unsigned integer convention.

F(24)-A(O):

Disables unit; enables CAMAC access.

F(25)-A(O):

Triggers the unit (equivalent to external front panel Trigger input): Q = 1 if unit was ready for Trigger; Q = 0 otherwise.

F(26)-A(O):

Enables unit; disables CAMAC access.

GENERAL

Delay Range:

170 nsec + 0 to 16.777215 msec in 1 nsec increments.

Accuracy:

+/- 200 psec +/- time base error.

Jitter:

150 psec RMS maximum; up to 1 msec delay (see manual for additional information).

Insertion Delay:

170 nsec.

Crosstalk:

< 500 psec when delays differ by less than 8 nsec, 0 otherwise.

Power Requirements:

40 mA at + 24 V
1.3 A at + 6 V
2.5 A at - 6 V
130 mA at - 24 V

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INPUT CHARACTERISTICS
Trigger Input (TRIG):	Two bridged front panel Lemo-type connectors; high input impedance; positive/negative edge selection via switch through side cover; threshold level adjustable between - 1.5 and + 1.5 V with a front panel potentiometer; 1OX threshold monitor on front panel; minimum input width: 5 nsec; the unused input must be terminated in 50 Ohm.
Clear Input (CLR):	Two bridged front panel Lemo-type connectors; high input impedance accepts NIM level pulses; minimum input width: 50 nsec; the unused input must be terminated in 50 Ohm. If a Clear pulse is received when a delay is being generated all outputs are reset to quiescent state and the Trigger input is enabled.
Clock Input (CK):	Two bridged front panel Lemo-type connectors: high input impedance; selected via an internal strap; NIM level inputs; the unused input must be terminated in 50 Ohm. Clock input frequency must be 31.25 MHz 0.1 %. Stability determines the long-term accuracy of the time delays.
OUTPUT CHARACTERISTICS
BUSY and BUSY Outputs (B & B'):	Two front panel Lemo-type connectors; NIM level outputs. BUSY output state goes true in response to a valid Trigger and remains true until either the end of the shortest delay or the end of the longest delay as selected by an internal switch.
Delayed Level Outputs (OUT & OUT):	Two front panel Lemo-type connectors per channel: NIM level outputs; both direct (OUT) and complementary (OUT) outputs are provided. A set of side panel switches permits the selection of either independent outputs or coupled window outputs for channels 1 and 2, or 3 and 4, separately:
Channels 1 and 2 (or 3 and 4) INDEPENDENT:	Each channel output (OUT) goes "true" when the corresponding programmed time delay has elapsed; output is reset by the Clear or by the next Trigger if the Retrigger Mode has been selected.
Channels 1 and 2 (or 3 and 4) COUPLED:	Channel 1 (3) output (OUT) goes "true" when time delay 1 (3) has elapsed and goes "false" when time delay 2 (4) has elapsed; delay 1 (3) < delay 2 (4). Channel 2 (4) output (OUT) goes "true" when delay 2 (4) has elapsed and is reset by Clear or by the next Trigger if the Retrigger Mode has been selected.
Delayed Pulse Output (Pl - P4):	One front panel Lemo-type connector per channel. Each Channel PULSE OUT delivers a 1 nsec risetime 5V pulse (into 50 Ohm) when the corres- ponding time delay has elapsed; pulse width 1 00 nsec +/- 10%.
CAMAC COMMANDS AND FUNCTIONS
Z:	Initializes module resets all channels, disables trigger input and enables CAMAC access (does not reset data registers).
C	Resets all channels (does not reset data registers), equivalent to front panel Clear input.
I	Disables trigger input when present.
X:	X response is generated for each valid function.
Q:	Q response is generated for each valid function unless otherwise specified.
F(O)-A(0-3):	Reads selected programmed delay for channels 1-4 in 24 bits; Q=l always; 24-bit unsigned integer convention.
F(l)-A(O):	Reads status via Read Lines 1 to 4: Rl = 1 if shortest delay elapsed; R2 = 1 if longest delay elapsed; R3 = 1 if Model 4222 is ready for trigger; R4 = 1 if CAMAC access enabled. All states are strobed by the leading edge of the CAMAC N signal.
F(9)-A(O):	Resets all channels (does not reset data registers) equivalent to external Clear input.
F(1 6)-A (0-3):	If CAMAC access enabled, writes delay to selected channel 1-4 in 24 bits. Q = 1 if CAMAC access enabled; Q = 0 otherwise. 24-bit unsigned integer convention.
F(24)-A(O):	Disables unit; enables CAMAC access.
F(25)-A(O):	Triggers the unit (equivalent to external front panel Trigger input): Q = 1 if unit was ready for Trigger; Q = 0 otherwise.
F(26)-A(O):	Enables unit; disables CAMAC access.
GENERAL
Delay Range:	170 nsec + 0 to 16.777215 msec in 1 nsec increments.
Accuracy:	+/- 200 psec +/- time base error.
Jitter:	150 psec RMS maximum; up to 1 msec delay (see manual for additional information).
Insertion Delay:	170 nsec.
Crosstalk:	< 500 psec when delays differ by less than 8 nsec, 0 otherwise.
Power Requirements:	40 mA at + 24 V 1.3 A at + 6 V 2.5 A at - 6 V 130 mA at - 24 V