The LeCroy Model 4208 Time-to-Digital Converter (TDC) is designed to cover applications where time measurements must be performed in real time, and require wide dynamic ranges with high resolution.
The Model 4208 has eight independent channels, each of which measures the time from the leading edge of a common input pulse to the leading edge of its individual input pulse.
Due to the particular design, common start input mode as well as common stop input mode can be used. The TDC will encode input pulses preceding the common input as negative times and input pulses arriving after the common input as positive times.
The 4208 TDC may also operate as a single channel multi-hit (8) TDC. In this strap selectable mode, all eight channels are cascaded, each channel hit enables the next one. The unit may also be configured as a dual channel TDC with multi-hit (4), a quad TDC with double hit, or almost any combination of mulit-hit.
The 4208 converts the measured time intervals into a 23-bit digital word plus a 24th sign bit which indicates whether or not the common input has preceded the individual input. This corresponds to a dynamic range of +/- 8.3 msec (which is expandable with an external clock and appropriate logic circuits).
The module is equipped with a high stability crystal controlled 125 MHz clock. The 1 nsec resolu- tion is realized by digital interpolation between two clock pulses. Dead time after an event has occurred is negligible and data readout can occur immediately after the event.
SPECIFICATIONS CAMAC Model 4208 8 CHANNEL WIDE RANGE REAL-TIME TDC
INPUTS |
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8 Individual Inputs: |
One Lemo-type connector per channel, impedance 50 Ohm; protected to +/- 3 A for 0.5 usec, clamping at + 6 and - 6 V; each input is followed by a fast discriminator, minimum input pulse width is 4 nsec; threshold is common to the 8 channels and is adjustable by a front panel potentiometer (IND TH) from - 1.5 V to + 1.5 V; threshold precision +/- 20 mV; 10x threshold monitor on the front panel. Multi-hit selectable by internal straps. |
Common Input (COMMON): |
One Lemo-type connector, high impedance 50 Ohm; protected to +/- 3 A for 0.5 usec, clamping at + 6 and - 6 V; the input is followed by a fast discriminator, minimum input pulse width is 4 nsec; threshold adjustable by a front panel potentiometer (TH) from - 1.5 V to + 1.5 V; 10 x threshold monitor on the front panel. |
Individual Veto Inputs (I N D): |
Two bridged Lemo-type connectors, high input impedance; accepts NIM levels; the eight individual inputs are inhibited for the duration of the veto; active for the first hit only in multi-hit mode. |
Common Veto Inputs |
Two bridged Lemo-type connectors, high input impedance; accepts NIM levels; the common input is inhibited for the duration of the veto. |
End of Time Window (EDW): |
Two bridged Lemo-type connectors; high input impedance; accepts NIM level pulses; LAM is generated in response to the leading edge allowing readout of the unit. Internal monostable provided, range adjustable from 0.2 to 8 msec (set at factory to 8 msec); OR'd with the external EDW input; can be disabled via internal strap. |
Fast Clear Input (CLR): |
Two bridged Lemo-type connectors; high input impedance; accepts NIM levels; the unit is ready to operate approximately 50 nsec after the trailing edge of the Fast Clear Input. |
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> 50 nsec. |
External Clock Input (C K I N): |
Two bridged Lemo-type connectors; high impedance NIM input active in external clock mode only. Permits absolute time accuracy improvement, and time range expansion (clock suppression during "no event deadtime"). Note: If the duty cycle of external clock is not 50% +/- 5%, time linearity can be affected. |
OUTPUTS |
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BUSY Output (B' and B): |
Two Lemo-type connectors; two NIM levels are started by a nine-input OR of the eight individual in- puts and the common input, and are stopped by the clear; allow various input veto logic combina- tions; complementary outputs are provided. |
CAMAC COMMANDS |
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Z, C: |
Initialize module; clears all channels and clears the LAM. |
1: |
Inhibits all channel inputs during CAMAC inhibit command. |
Q: |
Conditional response for F(O), F(2), F(8), F(10). |
X: |
X= 1 response is generated for each valid function. |
L: |
When enabled (jumper option), LAM is generated by the unit in reponse to either the "End of Time Window" input or the internal monostable pulse, whichever comes first. |
F(O)-A(O) to A(7): |
Addressed readout; read data on Read Lines (2's complement convention); Q = 0 if an empty chan- nel is read; Q= 1 otherwise. |
F(2)-A(O) to A(7): |
Addressed readout as for F(O); F(2)-A(7) clears the unit at S2; does not clear the LAM. |
F(8)-A(O): |
Test Look-at-Me; Q= 1 if LAM is present. |
F(9)-A(O): |
Clears unit; resets LAM and all channels. |
F(1O)-A(O): |
Test and clear Look-at-Me; Q = 1 if LAM is present. |
GENERAL |
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Resolution: |
1 nsec |
Dynamic Range: |
23 bits + 1 bit for sign, Expandable via external clock mode. |
Integral Non-Linearity: |
+/- 1 count |
Encoding Time: |
None, the time is encoded in real time. |
Multi-hit Dead Time: |
Inherent dead time (time reference at front panel Lemo-type connector): 3 nsec typical. |
Packaging: |
Single width CAMAC standard module. |
Power Requirements: |
1.5 A at 6 V; |