LeCroy's CAMAC Model 2323 is a fully programmable gate and delay generator packaged with two channels in a double width CAMAC module. Its gate duration is programmable over the range 100 nsec to 10 seconds, covering a dynamic range of eight orders of magnitude. Outputs as short as 50 nsec can be selected at the expense of accuracy and stability. All settings may be programmed under CAMAC control or via front panel switches. Under CAMAC control, settings are overwritten whereas they are incremented under manual control. The Model 2323 offers excellent stability and jitter properties with 0.2% of Full Scale accuracy in the gate setting.
The Model 2323 offers both Start and Stop inputs. This allows the output pulse width to be determined by the Start - Stop time difference in the latched mode or by the internal timer in the preset mode. A Blanking NIM input causes a notch to be taken out of the gate, equal in duration to the blanking input. This is especially useful to gate off data acquisition during spurious periods. Conversely, a NIM OR input causes all outputs to be set to true for the duration of the OR inputs.
The unit offers NIM and NIM outputs equal in duration to the gate width selected. In addition, a DELAY output is produced at the trailing edge of the Gate pulse. The Model 2323 also provides a differential ECL output and a TTL output capable of driving a NIM Bin Gate. Both the ECL and TTL outputs may be driven from either the Gate or Delay circuit. These options are selected by board mounted shorting plugs.
The gate duration and width of the Delayed output are programmable under CAMAC control. Each of the two channels may be set independently. All values which are loaded into the Model 2323 may also be read back via CAMAC. Programming of the delay involves a ten bit "mantissa" and a three bit "characteristic".
The Start input is normally configured to accept NIM signals. A bridged high impedance input is employed t o allow the trigger of more than one channel of 2323. The front end of the Start input consists of a comparator circuit, factory adjusted to trigger at - 400 +/- 50 mV. A front panel accessed multiple turn potentiometer allows the user to adjust the threshold over the range - 3 V to + 3 V. This allows the unit to be triggered by NIM, ECL, TTL or other standard logic signals. A front panel accessed switch selects either the positive-going or negative-going edge as the trigger. The stop input accepts NIM standard pulses.
SPECIFICATIONS CAMAC Model 2323 Programmable Dual Gate and Delay Generator
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Gate Width Range: |
100 nsec to 10 sec; pulses to 50 nsec at reduced accuracy and stability |
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Accuracy: |
+/-0.2% of full scale (mantissa) |
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Temperature Stability: |
<200 ppm/'C |
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Jitter: |
<0.2% of setting |
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Resolution: |
0.1% of full scale (mantissa) |
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Delay Width Range: |
1 0 nsec to 300 nsec |
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Width Options: |
1 0 nsec, 30 nsec, 1 00 nsec, 300 nsec |
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Accuracy: |
+/-20% |
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Inputs |
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START: |
Bridged high impedance pair. Lemo-type connectors. Input trigger level adjustable over the range +/-3 V via front panel potentiometer. As supplied, the input is set to trigger at -400+/-50 mV with a negative going edge. Action of the input is to initiate the timing cycle. |
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STOP: |
Standard NIM. Impedance 50 Ohm. Lemo-type connectors. Action of the input is to terminate the timing cycle in the latched mode. Active in both latched and preset modes. The delay is <20 nsec. |
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OR: |
Standard NIM input via Lemo-type connector. Input impedance 50 Ohm. Produces NIM, NIM', ECL, and TTL outputs as long as the OR signal is asserted. |
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BLANK: |
Standard NIM input via Lemo-type connector. Input impedance 50 Ohm. Cancels NIM, NIM', ECL, and TTL outputs as long as the BLANK signal is asserted. Overrides OR input. |
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Outputs |
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BUSY LED: |
Indicates unit is active; duration stretched to 1 msec minimum. |
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NIM: |
Standard NIM (- 1 6 mA) signal via a Lemo-type connector. Goes low for gate duration. Risetime <=2 nsec. Falltime +/-2.5 nsec. Standard NIM (-16 mA) signal via a Lemo-type connector. Goes high for gate duration. Risetime <=2 nsec. Falltime <=2.5 nsec. |
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ECL: |
One per section. Complementary ECL levels via a 2-pin connector. PC mounted shorting plug allows this output to be logically identical to the GATE or DELAY pulse or their complements. |
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TTL: |
One per section. An FET open drain output (+ 35V Max, 250 mA, 0.5 W Max). PC mounted shorting plug allows this output to be logically identical to the GATE or DELAY pulse or their complements. |
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DELAY: |
Standard NIM (-16 mA). Lemo-type connector. Delayed from start of NIM by the gate width. (Goes low at trailing edge of gate). Programmable for 10, 30, 100 or 300 nsec duration. Risetime <=2 nsec. |
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CAMAC COMMANDS |
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F(l) A(O) |
Read channel A programming word. |
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F(l) A(l) |
Read channel B programming word. |
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F(9) A(O) |
Stop channel A gate. |
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F(9) A(l) |
Stop channel B gate. |
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F(l 7) A(O) |
Write channel A programming word. |
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F(l 7) A(l) |
Write channel B programming word. |
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F(25) A(O) |
Start channel A gate. |
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F(25) A(l) |
Start channel B gate. |
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C or Z |
Stops channels A and B gates. |
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Programming Word |
M= mantissa |
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W16 |
W15 |
W14 |
W13 |
W12 |
W11 |
W10 |
W9 |
. . . |
W2 |
W1 |
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Programmable mode: |
(L=O). Duration = M-10 nsec. (For 100<=M<=1023). Settings of 50<=M<100 at reduced accuracy and stability. |
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Latched mode: |
(L=l). Duration = time between STOP and START inputs. |
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Delay Options: |
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Width |
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00 |
10 nsec |
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01 |
30 nsec |
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10 |
100 nsec |
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11 |
300 nsec |
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General |
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Input-Output Delay |
24 nSec. (Start input to NIM output.) |
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Recovery Time: |
None. The unit may be retriggered any time after the timing cycle has been completed. |
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Power Consumption |
1.8A @ +6V |