The Model 2132 is a dual port device, communicating with the HV4032 serial daisy chain via a Universal Asynchronous Receiver Transmitter (UART) and with CAMAC via Dataway. Data words written into the 2132 from CAMAC are loaded into a 40-word deep FIFO and are available for CAMAC readout (Figure 6.2). Full buffering of both ports has been provided to allow efficient operation in spite of the drastic difference between the speed of the serial daisy chain and that of the computer.

Two levels of interrupt are employed by the 2132 system: High Priority (Ll) and Low Priority (L2) LAM's. The High Priority LAM is employed for failures which require immediate response. The Low Priority LAM is used to indicate completion of data transmission from the HV4032 to the 2132 Interface. The L2 may be defeated by a TTL clamp-to-ground at the front panel DISABLE Input. In this way, routine responses from the HV4032's may be masked off when a LAM would be inconvenient. For example, voltages may be measured during data taking and read out, when the computer is in- active.

Data transmission of the Serial Daisy Chain is done at 2400 BAUD using a modified ASCII code. Sixteen bit command words written into FIFO 2 are broken into three 6-bit characters. The UART adds one start bit, two stop bits, and a parity bit. The 2132 control circuitry adds a flag bit allowing the system to perform framing checks. L1 and L2 are used for setting the LAM status on (but not for resetting it).

Eighteen databits are transferred, two of which are used as LAM Status Bits only on transmission to the 2132. Data transfer from the 21.32 to -the, HV4032 Modules is considerably slower than the corresponding response com- munication. Because of the computer error checking (parity, framing, ect.) the HV4032 requires approximately lOO msec between characters, making the total transfer time approximately 250 msec/word. This timing is controlled by hardware within the 2132.

Responses are transmitted at the rate of 15 msec/word. THUS, TRANSMISSION OF 32 VOLTAGE SETTINGS REQUIRES APPROXIMATELY SIX (6) SECONDS. In contrast, reading back 32 voltages can be accomodated in 500 msec.

6.4 2132 Programming

Programming of the HV4032/2132 system involves a 16-Bit word format. The constituent syllables that comprise the datawords are as follows:

M Mainframe address, M=0 used for addressing all units on
 the daisy chain (6-Bits)

C Channel number (6-Bits)

V Voltage (12-Bits)

T Control Tag. See Figure 6.6,(4-Bits)

S Software Switch (1-Bit right justified in a 6-Bit field)

The COMMANDS and RESPONSES are indicated in Figure 6.6 These words are written into the 2132 via CAMAC F(16) commands. A list of CAMAC function codes is given in Figure 6.5.

A programming example flow diagram follows to illustrate general procedure for operation of the 2132.

CAMAC clear (C or Z) is recommended after power up of the 2132. After this initialization it should not be necessary to clear the module again. (Use of clear function may, in fact, cause erroneous data to be read out should it coincide with data transferred from an HV4032).

Data buffer (FIFO) clearing can he performed by gegenerating read cycles, F(2), until Q response equals zero. During normal read, F(2) should be continued until Q=0 to ensure all data available has been cleared.

A Q response following a write command, F(16), indicates that the 16 bit word has been accepted by the 2132. It will be transferred thereafter according to the timing set internally by hardware in the 2132 Interface.

The Finished Response can be used for non-handshake commands to inform the user when the command is completed. In the given example, the 33 words used to modify the voltage of 32 channels in mainframe 63 will be transmitted to the HV4032 at a rate determined by hardware in the 2132 Interface. The HV4032 will process this data, look for errors (parity), and send a Finished response on completion of the command. If the high voltage is ON the response will occur after the voltages have been modified. If the high voltage if OFF the response will be given upon receipt of the data.

After the high voltage ON command is used, a delay of approximately 20 seconds allowing voltage run-up will be experienced before the finished response will be given. (Response is generated when the microprocessor is no longer "busy".) The user should modify his software for his convenience so that considerable computing time is not lost in waiting for this response. (See Figure 6.4.4.)

In generating commands to the HV4032 via the 2132 CAMAC Interface, care should be exercised in writing into the FIFO 2 (figure 6.2). Though the buffer is 40 words deep it must be realized that the buffer data is trans- ferred to the HV4032 at a much slower rate than the CAMAC dataway can write. Do not attempt to write more than 40 words at one time.

If several commands are to be given, i.e., modify 32 channels for more than one mainframe, wait for a response from the first mainframe before addres- sing the next.

A module zero address can be used to address all mainframes in a daisy chain. Never use this command where a response total].ng more than 40 words will occur. For example, requesting 32 ADC voltages from all mainframes.

Error detection is performed by decoding the 16-Bit response words. The lower order four bits will define the nature of the error. (i.e.,12=parity, 13=ovewrite) . A Darity error implies a command to a HV4032 which was not recognized. This can be generated by any unit in a daisy as all unit will see the command from the 2132, but only the HV4032 regognizing the address should respond the the command given.

Each of the three characters in a word has a parity bit which is checked before the data is processed. If a parity error is detected, the command will be aborted and the user will have to re-initiate the command.

An overwrite error will occur should a second character arrive before the first character is processed. The likelyhood of this occurring is very small since the timing is controlled by hardware in the 2132 Interface. In the event that an overwrite error is detected, the command be aborted and will necessitate re-initialization of the command as above. Both over- write and parity are errors detected at the HV4032.

Transmission error is detected at the 2132 and includes either parity or overwrite error of a response.