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xilinx:xdl

For information on the tool: xdl_cli

XDL is the current generation Xilinx “assembly language”. Presumably its an improvement over LCA.

The term “XDL” can refer to both the program and the language. Possibly though as written “xdl” generally refers to the tool while “XDL” refers to the language

General syntax

File example: xdl_example

XDL is a hierarchal text-based format somewhat like XML but using parentheses instead of angle brakcets.

Comments begin with a # character and continue to the end of the line.

The general format of a leaf node in XDL is

(foo arg1 arg2 ... argN)

The general format of a parent node is

(foo arg1 arg2 ... argN
  (child1 arg1 arg2 ... argN)
)

In most but not all cases the last argument of a parent node is the number of child nodes.

Device Descriptions

Describes the entire device, apparently intended for third party tools.

To generate, run “xdl -report [-pips] [-all_conns] devicename”. For example, “xdl -report -pips -all_conns xc6slx9-3ftg256”. Note that the device name may include a speed grade and package (package information is required if you want to know which IOBs are bonded and assign pin names to them) but the C/I temperature range designator must be omitted.

General Structure (for Spartan-6, others may vary slightly)

The entire file consists of a single root node of type “xdl_resource_report”. There are three arguments - a version number (most likely the XDL version), the device name, and the device family.

The bulk of content is contained within a “tiles” node, with two arguments (Y size and X size of the tile array) This node contains one “tile” node for each tile in the device.

Tile node format

The first two arguments are the Y and X coordinates of the tile in the global address space. This is followed by the name of the tile (for example “TIOB_X1Y63”), the type (for example “TIOB”), and the number of child nodes.

The tile node contains several types of child node.

Primitive Site

A “primitive_site” node describes a single BEL within the tile.

The first argument is the name of the primitive, as used in a LOC declaration (for example “C4” for an IOB). This is then followed by the type of the primitive (for example “IOBM”), an attribute flag, and the number of child nodes.

The attribute flag is one of the following:

  • “bonded” for IOBs broken out to pads in the device
  • “unbonded” for IOBs with no external connection
  • “internal” for most other nodes
Pinwire

Most primitives contain one or more “pinwire” declarations. A pinwire node describes a single BEL pin.

The first argument is the name of the pin (for example “PCI_RDY”, “DIFFI_IN”). This is followed by the direction (“input” or “output”), and the name of the wire the node is connected to (for example “TIOB_PCI_RDY0”).

Wire

Connection

PIP

Tile summary

A “tile_summary” node summarizes the resources in the tile.

The first two arguments are the name and type of the tile as seen in the tile declaration. These are followed by three numbers which describe the number of some resources in the tile. It's not known what they mean and for most purposes this node can be safely ignored.

xilinx/xdl.txt · Last modified: 2013/12/15 02:50 by mcmaster