Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
xilinx:xdl_example [2013/12/15 02:58]
mcmaster
xilinx:xdl_example [2013/12/15 17:02] (current)
mcmaster
Line 77: Line 77:
 Why does it matter if the IOB is bonded or not from XDL's perspective? ​ Maybe enforces driver settings differently?​ Why does it matter if the IOB is bonded or not from XDL's perspective? ​ Maybe enforces driver settings differently?​
  
-What is relationship between ​site definition ​and tile/site?+<​name>:​ 
 + 
 +<​sitedef>:​ whate type of logic this is (ex: SLICEL). ​ Allowed cfg will depend on this 
 +  * See special note in IOB section 
 + 
 +Placing: 
 +  * placed: has gone through PAR 
 +  * unplaced: location not yet assigned, ie post-MAP but pre-PAR 
 + 
 +<​tile>:​ region of the die logic is placed using standard Xilinx XY coordinates 
 + 
 +<​site>:​ where to place within the tile.  Some tiles only have one legal location but others like slices can have multiple sites per tile 
 + 
 +cfg <​string>:​ site type specific configuration such as what the value of a LUT should be or if an input should be inverted 
 + 
 + 
 +===== SLICEL example ===== 
 + 
 +inst "​SW0_inv"​ "​SLICEL",​placed CLBLM_R_X55Y53 SLICE_X89Y53 ​ , 
 +  cfg " A5FFINIT::#​OFF A5FFMUX::#​OFF A5FFSR::#​OFF A5LUT::#OFF A6LUT::#​OFF 
 +       ​ACY0::#​OFF AFF::#OFF AFFINIT::#​OFF AFFMUX::#​OFF AFFSR::#OFF AOUTMUX::#​OFF 
 +       ​AUSED::#​OFF B5FFINIT::#​OFF B5FFMUX::#​OFF B5FFSR::#​OFF B5LUT::#​OFF 
 +       ​B6LUT::#​OFF BCY0::#OFF BFF::#OFF BFFINIT::#​OFF BFFMUX::#​OFF BFFSR::#​OFF 
 +       ​BOUTMUX::#​OFF BUSED::#OFF C5FFINIT::#​OFF C5FFMUX::#​OFF C5FFSR::#​OFF 
 +       ​C5LUT::#​OFF C6LUT::#OFF CCY0::#OFF CEUSEDMUX::#​OFF CFF::#OFF CFFINIT::#​OFF 
 +       ​CFFMUX::#​OFF CFFSR::#OFF CLKINV::#​OFF COUTMUX::#​OFF COUTUSED::#​OFF 
 +       ​CUSED::#​OFF D5FFINIT::#​OFF D5FFMUX::#​OFF D5FFSR::#​OFF D5LUT::#​OFF 
 +       ​D6LUT:​SW0_inv1_INV_0:#​LUT:​O6=~A2 DCY0::#OFF DFF::#OFF DFFINIT::#​OFF 
 +       ​DFFMUX::#​OFF DFFSR::#OFF DOUTMUX::#​OFF DUSED::0 PRECYINIT::#​OFF SRUSEDMUX::#​OFF 
 +       ​SYNC_ATTR::#​OFF ​ _ROUTETHROUGH:​D:​DMUX " 
 +  ; 
 + 
 +"​SW0_inv":​ instance name 
 + 
 +"​SLICEL": ​site definition 
 + 
 +placed: has gone through PAR 
 + 
 +CLBLM_R_X55Y53: ​tile (where its placed) 
 + 
 +SLICE_X89Y53: ​site (where within the tile) 
 + 
 +cfg: misc options, see CLB usage guide for definition. ​ But of particular interest: 
 +  * 6LUT:​SW0_inv1_INV_0:#​LUT:​O6=~A2:​ 6 input LUT is defined as the output is A2 inverted
  
  
 
xilinx/xdl_example.txt · Last modified: 2013/12/15 17:02 by mcmaster
 
Except where otherwise noted, content on this wiki is licensed under the following license: CC Attribution 4.0 International
Recent changes RSS feed Donate Powered by PHP Valid XHTML 1.0 Valid CSS Driven by DokuWiki