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With a calibration slide, looking at the 0.01mm line target, I measured 423 +/- 3 pixels over 5 lines, yielding 84.5 +/- 1 nm per pixel.
This project seeks to document 54xx/74xx-series logic chips and subfamilies by imaging their dies and tracing out their schematics. The project started on March 4, 2017.
See the project at https://project5474.org.