[[azonenberg:xilinx:xc95144xl]]
 
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azonenberg:xilinx:xc95144xl [2014/02/05 06:24]
azonenberg created 		azonenberg:xilinx:xc95144xl [2015/01/04 22:50]
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-{{tag>collection_az vendor_xilinx type_logic type_logic/programmable type_logic/programmable/cpld year_2000 foundry_hejian tech_350nm}} 
  
-144-macrocell / 3200 gate [[vendor:xilinx|Xilinx]] [[vendor:xilinx:xc9500xl|XC9500XL series CPLD]]. 
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-Decapped on 2/4/2014 by lab group B of CSCI 4974/6974 at RPI. 
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-====== Package ====== 
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-{{:azonenberg:xilinx:dscf4703_cropped.jpg?300|}} 
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-====== Die ====== 
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-Die size: 3290 x 4000 μm (13.16 mm^2) 
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-{{:azonenberg:xilinx:xc95144xl_bf_neo5x.jpg?600|}} 
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-{{:azonenberg:xilinx:xc95144xl_09_bf_neo20x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc95144xl_10_bf_neo20x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc95144xl_11_bf_neo20x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc95144xl_12_bf_neo20x_annotated.jpg?600|}} 
 
azonenberg/xilinx/xc95144xl.txt · Last modified: 2015/01/04 22:50 (external edit)
 
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