[[azonenberg:xilinx:xc3s50an]]
 
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azonenberg:xilinx:xc3s50an [2014/02/05 02:28]
azonenberg 		azonenberg:xilinx:xc3s50an [2015/01/04 22:50]
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-{{tag>collection_az vendor_xilinx vendor_atmel year_2006 type_logic type_logic/programmable type_logic/programmable/fpga type_memory type_memory/flash type_memory/flash/nor foundry_ibm foundry_umc tech_90nm tech_unknown}} 
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-SRAM+Flash hybrid FPGA contains an XC3S50A die from Xilinx and an Atmel DataFlash die wire-bonded together. 
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-The die ID code of the FPGA (X8701) matches the regular XC3S50A. 
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-Full-die imagery of the FPGA was not acquired because the die is identical to the regular XC3S50A, which has already been imaged. 
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-====== Package ====== 
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-{{:azonenberg:xilinx:dscf4617_cropped.jpg?300|}} 
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-Label: 
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-    (X) XILINX (R) 
-    SPARTAN (R) 
-    XC3S50AN (TM) 
-    TQG144AGQ1341 
-    D4631772A 
-    4C 
-     
-Device was decapped in-package with 68% HNO3 on 1/29/2014 by lab group A of CSCI 4974/6974 at RPI. Note leadframe damage and bond wires with one end floating; the floating bond wires were easily bent by a short blast of compressed air. 
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-{{:azonenberg:xilinx:dscf4752_cropped.jpg?300|}} 
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-{{:azonenberg:xilinx:xc3s50an_01_bf_sz.jpg?300|}} 
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-{{:azonenberg:xilinx:xc3s50an_03_bf_sz.jpg?300|}} 
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-{{:azonenberg:xilinx:xc3s50an_04_bf_sz.jpg?300|}} 
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-====== Flash die ====== 
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-{{:azonenberg:xilinx:xc3s50an_flash_05_bf_neo5x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50an_flash_06_bf_neo10x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50an_flash_07_bf_neo20x_annotated.jpg?600|}} 
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-====== FPGA die ====== 
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-The FPGA die is covered by an overcoat which can be scratched off with a scalpel blade but does not respond to acid. Possibly some sort of polyimide? 
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-{{:azonenberg:xilinx:xc3s50an_08_bf_neo20x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50an_09_bf_neo20x_annotated.jpg?600|}} 
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azonenberg/xilinx/xc3s50an.txt ยท Last modified: 2015/01/04 22:50 (external edit)
 
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