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azonenberg:xilinx:xc3s50a [2014/04/27 00:42]
azonenberg
azonenberg:xilinx:xc3s50a [2015/01/04 22:50]
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-{{tag>collection_az vendor_xilinx year_2006 type_logic type_logic/programmable type_logic/programmable/fpga foundry_ibm foundry_umc tech_90nm}} 
  
-See also: [[mcmaster:xilinx:xc3s50a]] 
- 
-====== Package ====== 
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-No shot available right now :( 
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-Known to be die rev A. 
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-====== Die ====== 
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-Size is approximately 3200 x 2850 μm (9.12 mm<sup>2</sup>) 
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-===== M8 with intact passivation ===== 
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-{{:azonenberg:xilinx:xc3s50a_bf_neo5x.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50a_07_bf_neo20x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50a_08_bf_neo20x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50a_09_bf_neo20x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50a_10_bf_neo40x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50a_11_bf_neo40x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50a_12_bf_neo40x_annotated.jpg?600|}} 
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-{{:azonenberg:xilinx:xc3s50a_13_bf_neo40x_annotated.jpg?600|}} 
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-===== M8 with passivation removed ===== 
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-{{:azonenberg:xilinx:xc3s50a:xc3s50a_m8_bf_neo5x_3k.jpg?600|}} 
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-===== M7 ===== 
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-{{:azonenberg:xilinx:xc3s50a:xc3s50a_m7_bf_neo5x_3k.jpg?600|}} 
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-M6 and below could not be revealed cleanly with HF etching, need to CMP another die. 
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-===== Active ===== 
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-{{:azonenberg:xilinx:xc3s50a:xc3s50a_active_bf_neo5x_3k.jpg?600|}} 
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-Might be some poly too. 
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-Left side of block RAM 
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-{{:azonenberg:xilinx:xc3s50a:xc3s50a_active_30_bf_neo40x_annotated.jpg?600|}} 
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-Gap between two groups of CLBs 
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-{{:azonenberg:xilinx:xc3s50a:xc3s50a_active_31_bf_neo40x_annotated.jpg?600|}} 
 
azonenberg/xilinx/xc3s50a.txt · Last modified: 2015/01/04 22:50 (external edit)
 
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