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azonenberg:xilinx:xc2c64a [2014/02/02 23:27]
azonenberg |
azonenberg:xilinx:xc2c64a [2014/02/02 23:41]
azonenberg |
| {{tag>collection_az vendor_xilinx type_logic type_logic/programmable type_logic/programmable/cpld foundry_umc tech_180nm}} | {{tag>collection_az vendor_xilinx type_logic type_logic/programmable type_logic/programmable/cpld foundry_umc tech_180nm year_2004}} |
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| [[vendor:xilinx|Xilinx]] [[vendor:xilinx:xc2c|CoolRunner-II CPLD]] with 64 macrocells. The -A version supports two I/O banks while the baseline XC2C64 only has one. | [[vendor:xilinx|Xilinx]] [[vendor:xilinx:xc2c|CoolRunner-II CPLD]] with 64 macrocells. The -A version supports two I/O banks while the baseline XC2C64 only has one. |
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| ====== Die overview ====== | ====== Die overview ====== |
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| | Die size: 1930 x 2390 μm (4.61 mm^2) |
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| {{:azonenberg:xilinx:xc2c64a_bf_neo5x.jpg?600|}} | {{:azonenberg:xilinx:xc2c64a_bf_neo5x.jpg?600|}} |
