Differences

This shows you the differences between two versions of the page.

--- azonenberg:microchip:enc424j600 [2014/03/27 05:52]
azonenberg
+++ azonenberg:microchip:enc424j600 [2015/01/04 22:50]
@@ Line 1: / Line 1: @@
-{{tag>collection_az vendor_microchip type_interface type_interface/serdes type_interface/serdes/ethernet type_network type_network/ethernet foundry_unknown tech_250nm}}
-/100mbit SPI/parallel Ethernet controller.
-Same 250 nm process technology as the PIC32MX series.
-====== Package ======
--pin QFN, decapped live.
-{{:azonenberg:microchip:s7300480_cropped.jpg?600|}}
-====== Die ======
-Rough stitch of old images with Am10x objective. Need to re-shoot at higher resolution.
-[[http://siliconpr0n.org/map/microchip/enc424j600/top_metal_am10x/|Map]]
-{{:azonenberg:microchip:enc424j600-m3-100x-cropped-4k.jpg?600|}}
-Close-up of dense logic area at upper right:
-{{:azonenberg:microchip:enc424j600_02_bf_neo40x_annotated.jpg?600|}}
-{{:azonenberg:microchip:enc424j600_01_bf_neo40x_annotated.jpg?600|}}
-Partial HF delayer of SRAM. Confirmed to be same process as PIC32 based on SRAM cell pitch.
-{{:azonenberg:microchip:enc424j600_sram_01_bf_neo40x_annotated.jpg?600|}}