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A small EEPROM memory card with “Secure Logic Access Control”. Has 192 bits on the die. Fabbed at the ST fab in Rousset, FR using the 1500nm CMOS tech node.

Datasheet: https://www.alldatasheet.com/datasheet-pdf/pdf/22202/STMICROELECTRONICS/ST1305B.html

Die

Die size: 1.40×1.18 mm approx.

Bonding pad opening: 128.2 um, square.

Metal pitch: 4 um.

Poly pitch: 3.75 um min / 4.5 um typ.

Poly width: 1.5 um min.

Text features on the die:

ST1305B
(Logo)
1991
(C) (M)
LS SF ML RF
OA JJM GC

siliconpr0n.org_map_st_st1305b_single_st_st1305b_infosecdj_mz_nikpa40x.thumb.jpg

Top metal imaged under Nikon PlanApo 40x/1.0 oil

siliconpr0n.org_map_st_st1305b_single_st_st1305b_infosecdj_mz_nikpa40x_poly.thumb.jpg

Poly+diffusuon imaged under Nikon PlanApo 40x/1.0 oil