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“The CY23FS04-3 is a FailSafe zero delay buffer with two reference clock inputs and four phase-aligned outputs.”

Reportedly produced at FAB2 using a 500nm process.

Package

CY23FS04Z
XC
1731 B 05
634595

Die

(M) Cypress
2002
(Logo)
7C80501A

siliconprawn.org_map_cypress_cy23fs04zxc_single_cypress_cy23fs04zxc_infosecdj_mz_nikpa40x.thumb.jpg

Top metal imaged using Nikon Plan Apo 40x/1.0 oil