pbx:dec:dc608
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| pbx:dec:dc608 [2024/12/23 22:05] – external edit 127.0.0.1 | pbx:dec:dc608 [2025/08/04 21:24] (current) – external edit 127.0.0.1 | ||
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| - | {{tag> | + | {{tag> |
| + | VAX-11/750 DC608 ALP Arithmetic and Logic Processor. | ||
| + | |||
| + | This is a DEC chip and as such is known under multiple IDs: | ||
| + | < | ||
| + | Schematic | ||
| + | Schematic | ||
| + | Package | ||
| + | Package | ||
| + | Bill of Materials: 1914682-00 | ||
| + | </ | ||
| + | |||
| + | Implements the ALU, last level shifter and Q,D registers in the 11/750 data path. | ||
| + | |||
| + | Built on the DC600 gate array, providing 400 4-input STTL NAND gates. | ||
| + | |||
| + | Technology specifications per EK-KA750-TD-002 (CPU Technical Description): | ||
| + | < | ||
| + | Implementation Technique - Gate Arrays | ||
| + | Circuit Technology | ||
| + | Circuit Density | ||
| + | |||
| + | Die Size - .215 in x .244 in | ||
| + | Power Utilized per Die - 2 W max | ||
| + | Package Size - 1.44 in2 (2.4 in x 0.6 in) | ||
| + | I/O Circuits per Die - 44 I/O transceiver gates | ||
| + | Logic Gates - 400 identical 4-input NAND gates | ||
| + | Voltage Used - 2.5V, 5.0V | ||
| + | Speed per Gate - 5 - 10 ns | ||
| + | </ | ||
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| < | < | ||
| </ | </ | ||
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| + | The package is an odd pinless version of a 48-pin sidebraze CERDIP. | ||
| + | In the machine the die faces towards the PCB and a heatsink is attached to the top of the package (facing the back of die). | ||
| + | |||
| + | {{: | ||
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| < | < | ||
| + | DC600 | ||
| + | DC608 | ||
| + | |||
| + | XSC2594A | ||
| </ | </ | ||
| - | {{https://siliconpr0n.org/ | + | {{https://siliconprawn.org/ |
| - | [[https://siliconpr0n.org/ | + | [[https://siliconprawn.org/ |
| - | * [[https://siliconpr0n.org/ | + | * [[https://siliconprawn.org/ |
pbx/dec/dc608.1734991515.txt.gz · Last modified: 2024/12/23 22:05 by 127.0.0.1
