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foundry:umc [2014/07/16 19:38]
azonenberg [180 nm]
foundry:umc [2015/01/04 22:50] (current)
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   * 8" wafers   * 8" wafers
  
 +===== 90 nm =====
 +
 +==== General characteristics ====
 +
 +Mostly copper with thick aluminum on the top layer.
 +
 +==== Identification ====
 +
 +==== Devices ====
 +
 +{{topic>foundry_umc +tech_90nm}}
 ===== 180 nm ===== ===== 180 nm =====
  
-4-5 metal layers.+==== General characteristics ==== 
 + 
 +1.8V core with I/O up to 3.3V. Many mixed-signal devices will have an on-die LDO for generating 1.8 from 3.3 however higher end devices such as programmable logic typically expect an external 1.8V supply. 
 + 
 +4-5 aluminum layers with tungsten vias, titanium-based barrier metal, and cobalt silicide contacts.
  
 Partial design rules and FIB sections at http://siliconexposed.blogspot.com/2014/02/process-overview-umc-180nm-envm.html Partial design rules and FIB sections at http://siliconexposed.blogspot.com/2014/02/process-overview-umc-180nm-envm.html
  
-Layouts can vary, as does presence or absence of CMP filler between bond pads.+Power ring and pad layouts can vary somewhat, as does presence or absence of CMP filler between bond pads
 + 
 +On-die Flash/EEPROM option available. 
 +==== Identification ==== 
 + 
 +The CMP filler pattern is distinctive and can be used as positive ID. Fill polygons are rectangles with 2:1 aspect ratio, long side oriented parallel to the prevailing routing direction.
  
 CMP fill pattern table (measured from XC2C32A) CMP fill pattern table (measured from XC2C32A)
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 ^ M3    | 3075  | 1125   | 3952         | 1995         | With M3 removed | ^ M3    | 3075  | 1125   | 3952         | 1995         | With M3 removed |
  
 +==== Devices ====
 +
 +{{topic>foundry_umc +tech_180nm}}
 ====== Devices ====== ====== Devices ======
  
 {{topic>foundry_umc}} {{topic>foundry_umc}}
 
foundry/umc.1405539505.txt.gz · Last modified: 2014/07/16 19:38 by azonenberg
 
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