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 {{topic>foundry}} {{topic>foundry}}
 +
 +====== Foundry ID (FIXME: clean up) ======
 +
 +Device vendors concerned about reverse engineering often use simple tricks to make it harder to put a BOM together. One of these is to remove the labeling from, or even re-label with a laser engraver, various ICs on the board. Re-labeling can also be done for brand reasons.
 +
 +The first step in identifying an unknown components is to determine the vendor. If there's no logo on the die this can be difficult, but fab processes vary enough from vendor to vendor that some hints can be gained just by looking at the die structure.
 +
 +This page is a library of specific process examples, not a place to discuss general fabrication techniques. General fab topics belong on the [[siliconprawn>process_tech|process technology]] page.
 +
 +====== CMP fill ======
 +
 +Although only present on smaller (<=350nm typically) process technology, CMP fill patterns are distinctive enough that a pretty good guess of the vendor can sometimes be obtained from the fill pattern alone.
 +
 +All images shown are top metal with overglass intact, unless otherwise labeled.
 +
 +Please try to include scale bars in all images.
 +===== Actel =====
 +
 +{{:mcmaster:foundry:actel_a54sx32a_mit20x.jpg?500|}}
 +
 +===== Adaptec =====
 +
 +{{:mcmaster:foundry:adaptec:7902:ns50xu_0.jpg?500|}}
 +
 +===== ATI radeon =====
 +
 +{{:mcmaster:foundry:ati_radeon_probably_mit20x.jpg?500|}}
 +
 +===== Atmel =====
 +
 +==== 350nm aluminum ====
 +
 +FIXME: get a picture with a scale bar
 +
 +The fill pattern is very distinctive and looks like a "brick wall" - short lines staggered every other row.
 +
 +{{:protected:vendorid:flylogic-atmel-350nm-cmpfill.jpg?500|}}
 +
 +(image copyright Christopher Tarnovsky, originally published on [[http://www.flylogic.net/blog/?p=23|Flylogic blog]], used with permission)
 +
 +===== Cisco Systems =====
 +
 +{{:mcmaster:foundry:cisco_ibm_100x.jpg?500|}}
 +
 +IBM logo on chip. Am100x objective?
 +
 +===== FTDI =====
 +
 +{{:protected:vendorid:ft232rl_15_bf_neo40x_annotated.jpg?500|}}
 +
 +===== Microchip =====
 +
 +==== 350nm aluminum ====
 +
 +Example image from PIC12F683. Overglass generally appears deep red to orange, CMP fill is long straight lines.
 +
 +{{:protected:vendorid:microchip-350nm-cmpfill.jpg?500|}} 
 +
 +==== 250nm copper ====
 +
 +The exact geometry of this process isn't known but it's copper damascene and significantly smaller than the 350.
 +
 +Example image from ENC424J600. Overglass appears orange to yellow. CMP fill is short lines.
 +
 +
 +{{:protected:vendorid:microchip-250nm-cmpfill.jpg?500|}}
 +
 +==== pic32mx695f ====
 +
 +{{:mcmaster:foundry:pic32mx695f_512h-80ip_mit20x.jpg?500|}}
 +
 +===== Myricom =====
 +
 +{{:mcmaster:foundry:myricom_not_crossbar.jpg?500|}}
 +
 +===== NXP / Philips =====
 +
 +==== Unknown geometry, possibly 220nm ====
 +
 +Fill pattern is large square patches of metal with spaces between them.
 +
 +{{:protected:vendorid:nxp-250nm-cmpfill.jpg?500|}}
 +
 +===== Sysmocom =====
 +
 +{{:mcmaster:foundry:sysmocom.jpg?500|}}
 +
 +Has several fill patterns, second metal down is somewhat visible
 +
 +====== Routing ======
 +
 +===== Power =====
 +
 +===== Cell =====
 +
 +
 +====== Security mesh ======
 +
 +Smartcard vendors are extremely secretive and competitive and the mesh patterns are all developed in house. If a device has mesh on it, a matching pattern can typically be considered a positive ID of the vendor.
 +
 +===== Atmel =====
 +
 +===== Infineon =====
 +
 +===== Renesas =====
 +
 +Die labeled R5H30201, found in an unlabeled QFN. 
 +
 +The mesh runs vertically and horizontally.
 +
 +FIXME: get image rotated to canonical orientation on an edge of the die
 +
 +{{:protected:vendorid:renesas-mesh.jpg?500|}}
 +
 +{{:drm:renesas:r5h30201_1000x_20kv_19mm_6e-09a_se_18.jpg?500|}}
 +===== ST =====
 +
 +ST7 series smartcard, origin unknown. The mesh runs at a 45 degree angle to the vertical axis of the chip and consists of two conductors. 
 +
 +This is one of the few images we have taken with a SEM rather than a light microscope because they're expensive to get time on. I (azonenberg) was imaging some MEMS prototypes on a Zeiss Supra 55 in the RPI cleanroom for a customer and decided to buy an extra hour of scope time out of my own pocket while I was in the lab.
 +
 +The sample was not sputter-coated with anything conductive and had severe charging problems, this was the only image I got that was useful.
 +
 +FIXME: get image rotated into canonical orientation on an edge of the die
 +
 +{{:protected:vendorid:st7-mesh.jpg?500|}}
 +
 +===== Xilinx =====
 +
 +XC6SLX4 (45nm Samsung process). Damage to passivation was from overly aggressive cleaning.
 +
 +{{:azonenberg:foundry:xilinx:xc6slx4_24_bf_neo40x_annotated.jpg?500|}}
 +
 +====== Test patterns ======
 +
 +Test patterns and alignment marks are often very fab or vendor specific.
 +
 +====== Misc ======
 +
 +===== SandForce SF-2281VB1-SDC =====
 +
 +{{:mcmaster:foundry:sandforce_sf-2281vb1-sdc.jpg?500|}}
 +
  
 ====== References ====== ====== References ======
foundry/start.txt · Last modified: 2025/11/17 23:53 by mcmaster