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—azonenberg:xilinx:xc2c64a [2025/08/04 21:24] (current) – external edit 127.0.0.1
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 +{{tag>collection_az vendor_xilinx type_logic type_logic/programmable type_logic/programmable/cpld foundry_umc tech_180nm year_2004}}
  
 +[[vendor:xilinx|Xilinx]] [[vendor:xilinx:xc2c|CoolRunner-II CPLD]] with 64 macrocells. The -A version supports two I/O banks while the baseline XC2C64 only has one.
 +
 +====== Package ======
 +
 +CPG56 - 0.5mm chip-scale BGA.
 +
 +Markings:
 +  [Xilinx logo] 2C64A
 +  F43891-1037
 +  PHILLIPINES
 +  C4-AMS 7C
 +
 +{{:azonenberg:xilinx:s7303200_cropped.jpg?300|}}
 +
 +====== Die overview ======
 +
 +Die size: 1930 x 2390 μm (4.61 mm^2)
 +
 +{{:azonenberg:xilinx:xc2c64a_bf_neo5x.jpg?600|}}
 +
 +====== Closeups ======
 +
 +{{:azonenberg:xilinx:xc2c64a_01_bf_neo20x.jpg?600|}}
 +
 +{{:azonenberg:xilinx:xc2c64a_04_bf_neo40x.jpg?600|}}
 +
 +====== Map ======
 +
 +TODO