azonenberg:microchip:pic32mz2048ech
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| azonenberg:microchip:pic32mz2048ech [2014/03/24 15:32] – created azonenberg | azonenberg:microchip:pic32mz2048ech [2025/08/04 21:24] (current) – external edit 127.0.0.1 | ||
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| It's //brand new//, to the point that Microchip' | It's //brand new//, to the point that Microchip' | ||
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| + | Looks like a 90 nm copper process, probably 6-metal. Fill pattern looks like TSMC. | ||
| ====== Box ====== | ====== Box ====== | ||
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| ====== Die ====== | ====== Die ====== | ||
| - | TODO | + | Size is approximately 5800 x 5500 μm (31.9 mm< |
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| + | ===== Top layer ===== | ||
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| + | Overview | ||
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| + | Power distribution wiring | ||
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| + | Top left corner showing standard TSMC fill patterns | ||
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| + | Long shot of mask rev markings | ||
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| + | Closeup of mask rev markings. Looks like five copper layers and one thick aluminum layer. | ||
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| + | ===== Active ===== | ||
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| + | NOR flash | ||
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| + | Litho-optimized SRAM cells. Bitcell area matches published TSMC 90nm SRAM size exactly. | ||
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| + | Random gates in middle of die. | ||
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azonenberg/microchip/pic32mz2048ech.1395675175.txt.gz · Last modified: 2014/03/24 15:32 by azonenberg
