EDA dump

An Electronic Design Automation (EDA) Wiki

Originally created to be a a semi-organized brain dump for me (JM) to post Xilinx tutorials and other hard to find info on Xilinx tools. Contact me directly at JohnDMcMaster <at> gmail.com if you are interested in contributing

I'm also collecting info on here with the eventual intent of making open source FPGA tools. IMHO the industry has gone in the wrong direction and needs open source competition to advance the landscape. I think this sums it up pretty well regarding someone trying to get an else on VHDL generate:

I submitted a request for an else ages ago, but it didn't make it into
the standard.  Think about it, it would hurt more to change the
existing tools than we'd gain by having a language that made sense.

I'm not sure if he was being facetious or not but it really is the state of the industry.

General resources

http://www.asic-world.com/: get started with Verilog, VHDL. General syntax reference

https://verificationacademy.com/: learn industry verification methods

 
start.txt · Last modified: 2017/09/27 21:20 by mcmaster
 
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