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mcmaster:xilinx:xc9536xl [2013/01/29 21:24]
azonenberg |
mcmaster:xilinx:xc9536xl [2023/02/16 10:17] (current)
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| {{tag>collection_mcmaster vendor_xilinx type_logic type_logic/programmable type_logic/programmable/cpld year_2001}} | {{tag>collection_mcmaster vendor_xilinx type_logic type_logic/programmable type_logic/programmable/cpld year_2001 foundry_hejian tech_350nm}} |
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| ====== Overview ====== | ====== Overview ====== |
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| Xilinx XC9536XL CPLD (36 macrocells / 800 gates), available in 44PLCC/44TQFP/48CSBGA/64TQFP packages. The one we decapped was a 44TQFP. Note probe scrub marks from wafer test on unbonded pads. | 36-macrocell / 800 gate [[vendor:xilinx|Xilinx]] [[vendor:xilinx:xc9500xl|XC9500XL series CPLD]], available in 44PLCC/44TQFP/48CSBGA/64TQFP packages. The one we decapped was a 44TQFP. Note probe scrub marks from wafer test on unbonded pads. |
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| Made on on a 350 nm 5-metal aluminum process. Fab is unknown. | ====== Package ====== |
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| {{gallery>:mcmaster:xilinx:xc9536xl_overview.jpg|}} | ====== Die ====== |
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| ====== Package ====== | Approximate size: 1390 x 3150 μm (4.38 mm^2) |
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| | {{gallery>:mcmaster:xilinx:xc9536xl_overview.jpg|}} |
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| ====== Map ====== | ====== Map ====== |
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| http://siliconpr0n.org/map/xilinx/xc9536xl_vqg44awn1105__neo50xulwd__semipol_lev_noz_dirty/ | http://siliconpr0n.org/map/xilinx/xc9536xl/mcmaster_mz_neo50xulwd/ |
