Differences

This shows you the differences between two versions of the page.

--- azonenberg:ftdi:ft2232h [2014/07/16 19:57]
azonenberg created
+++ azonenberg:ftdi:ft2232h [2016/10/31 06:29] (current)
mcmaster
@@ Line 1: / Line 1: @@
-{{tag>collection_az vendor_ftdi year_2009 type_interface type_interface/serdes type_interface/serdes/uart type_interface/usb tech_180nm foundry_umc}}
+{{tag>collection_az collection_mcmaster vendor_ftdi year_2009 type_interface type_interface/serdes type_interface/serdes/uart type_interface/usb tech_180nm foundry_umc}}
-Tentatively ID'd as UMC 180nm from CMP filler pattern.
+Tentatively ID'd as [[foundry:umc#nm1|UMC 180nm]] from CMP filler pattern.
-This specimen was obtained from marshallh for failure analysis. Pins 5 and 6 are shorted together on die (verified by cutting the bond wire after live decap).
+This specimen was obtained from marshallh for failure analysis. Pins 5 and 6 are shorted together on die (verified by cutting the bond wire after live decap). Root cause unknown, pending further analysis
 ====== Package ======
@@ Line 23: / Line 23: @@
 Fuses are visible at the upper right side of the die. Probably used for selecting the 2232H or 4232H since these appear to be the same die (no 4232H has been decapped yet, but the 2232H says 4232 on it and the pinouts/static power match up exactly).
+Pin 1 is upper left. Note that some power pins, as well as the USB pair, have two bond pads per package pin.
 Size is approximately 2900 x 2890 μm (8.38 mm<sup>2</sup>)
+[[https://siliconpr0n.org/map/ftdi/ft2232h/mz_mit20x/|MZ @ mit20x]]
+    * [[https://siliconpr0n.org/map/ftdi/ft232h/single/ftdi_ft232h_mz_mit20x.jpg|Single]] ( MB, )
+<code>
+(C) FTDI 2009 - ft4232/A13
+</code>
 {{:azonenberg:ftdi:ft2232h:ft2232h_bf_neo10x_3k.jpg?800|}}

--- sidebar [2024/04/22 04:35]
azonenberg
+++ sidebar [2024/04/22 04:36] (current)
azonenberg old revision restored (2022/05/21 00:28)
@@ Line 1: / Line 1: @@
-{{tag>collection_az year_unknown vendor_microchip vendor_micrel type_interface type_interface/serdes type_interface/serdes/ethernet type_network type_network/ethernet foundry_tsmc tech_65nm}}
+[[:start|Top level]]
-Tech node info comes from IBIS file "[Source]      Made by TSMC 65nm IBIS model file"
+Lists of devices
-http://ww1.microchip.com/downloads/en/DeviceDoc/ksz9031%20IBIS.zip
-TODO: actually decap one :){{https://siliconpr0n.org/map/micrel/ksz9031rnx/single/micrel_ksz9031rnx_azonenberg_mz_mit20x.thumb.jpg}}
+    *  [[:collection|Collection]]
+      * See for copyright info
+    * [[:foundry:start|Foundry]]
+    * [[:tech:start|Process technology]]
+    * [[:type|Type]]
+    * [[:vendor:start|Vendor]]
+    * [[:year|Year]]
-[[https://siliconpr0n.org/map/micrel/ksz9031rnx/azonenberg_mz_mit20x/|mz_mit20x]]
+For newcomers
-  * [[https://siliconpr0n.org/map/micrel/ksz9031rnx/single/micrel_ksz9031rnx_azonenberg_mz_mit20x.jpg|Single]] (12317x8766, 24.8946MiB)
+    * [[:navigation|Navigating the site]]
+    * [[:your_first_page|Writing your first page]]
+Other
+    * [[:conventions|Conventions]] for naming etc
+    * [[:digitized|List of digitized chips]]
+    * [[:Counterfeit]]
+    * [[:true_mask_art|True mask art]]
+    * [[:Package|Package]]
+    * [[:stdcell|Cell libaries]]
+    * [[:hdl|HDL]]
+    * [[:prog:start|Programming]]
+    * [[:TODO|TODO]]
+    * [[:Links]]