{{tag>collection_az vendor_xilinx type_logic type_logic/programmable type_logic/programmable/cpld year_2000 foundry_hejian tech_350nm}} 144-macrocell / 3200 gate [[vendor:xilinx|Xilinx]] [[vendor:xilinx:xc9500xl|XC9500XL series CPLD]]. Decapped on 2/4/2014 by lab group B of CSCI 4974/6974 at RPI. ====== Package ====== {{:azonenberg:xilinx:dscf4703_cropped.jpg?300|}} Markings: (X) XILINX (R) XC95144XL (TM) TQG100AWN1105 D4205766A 7C ====== Die ====== Die size: 3290 x 4000 μm (13.16 mm^2) {{:azonenberg:xilinx:xc95144xl_bf_neo5x.jpg?600|}} {{:azonenberg:xilinx:xc95144xl_09_bf_neo20x_annotated.jpg?600|}} {{:azonenberg:xilinx:xc95144xl_10_bf_neo20x_annotated.jpg?600|}} {{:azonenberg:xilinx:xc95144xl_11_bf_neo20x_annotated.jpg?600|}} {{:azonenberg:xilinx:xc95144xl_12_bf_neo20x_annotated.jpg?600|}}